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Part 1 Analogue Circuit Design Question 1 a) Consider the circuit shown in figure B2a. Assume VDD = 5 V, Iref = 0.25 mA, = 0.7V, (VTH)3-4 = -0.7 V, L1 = 1 m, W1 = 10 m, L2 = 1 m, W2 = 50 m, L3 = 1 m, W3 = 10 m, L4 = 1 m, W4 = 50 m, Also assume that all MOSFETs are in saturation, the body effect is negligible and A = 0 V-1 . Determine Lout. (3) b) Consider the circuit shown in figure B2b Assume Vod = 5 V, Iss = 0.5 mA, (VTH)1-3 = 0.7 V, L1-3 = 1 m, W1-3 = 100 m, (k'n)1-3 = 40 A.V-2, , RD = 1 kQ. The body effect and channel length modulation may be neglected. i) Sketch the common-mode input-output characteristic. (3) ii) Now consider a mismatch of the RD resistors, such that ARD/RD = 10%. Calculate the common mode rejection ratio (CMRR). (6) c) i) Consider the circuit shown in figure B2c. Assume Vop = 5 V, ID = 0.5 mA, VTH = 0.7V, L = 0.5 m, W = 50 m, K'n = 40 A.V-2, , Rs = 1 RD = 2 kQ, CGS = 5.3x10-2 pF, CGD = 2x10-4 pF, CDB = 2.7x10-2 pF. The body effect and channel length modulation may be neglected. Calculate the small signal gain. (3) ii) Sketch the small-signal model for calculating the input impedance of the circuit and write an expression for the input impedance. (5) VDD Iref M3 M4 Lout X o M1 M2 - = - Figure B2a Vpp RD RD Vout2 Vout X Y o Vin2 Vinl o M1 M2 Vb o Iss M3 = Figure B2b VpD RD Ip CGD o Rs X M1 CDB + Vin CGS - - Figure B2c Part 2 Digital System Design Question 1 The state machine chart of Figure 1 is to be realised using two-address microprogramming a) Sketch the hardware arrangement for a typical microprogram implementation. Your diagram should include (i) a microprogram ROM (the control store), (ii) a multiplexor such that each of the inputs to the state machine can be selectively tested, (iii) a multiplexor to select which next state control should branch to, (iv) a state register and a clock signal. Define the four fields within the control store; TEST, NSF, NST and OUTPUT, where NST is next state true, and NSF is next state false. (5) b) Define all of the inputs to the multiplexor controlled by the TEST field. (2) c) Assuming the state assignment follows a binary natural number sequence, write down a table containing the full microcode to implement the state machine chart of Figure 1. (6) d) What modifications to the hardware arrangement are required if single address microprogramming is used? (2) S0/Z1 1 X1 S3/Z1 Z2 1 S1/Z2 X2 1 X1 S4/Z2 1 S2/Z1 X3 1 X3 S5/Z1 Z2 1 X3 Figure 1 Question 1 a) Explain the purpose of the hotplate steps involved in the application and patterning of photoresist films. Suggest a suitable hotplate temperature for each step. b) The dopant distribution that results from a diffusion step depends on the initial process conditions. For each set of initial conditions, draw diagrams to show how the dopant distribution will vary with distance into a substrate for increasing diffusion times. In each case, state the initial conditions. c) A silicon sample has been doped with gallium to a concentration of 8.3 x 1015 cm-3. Assuming a temperature of 300K: (i) Calculate the carrier concentrations within the sample. (ii) Suggest a suitable dopant, and calculate the concentration to be introduced to the same sample in order that the Fermi energy is positioned 160 meV below the conduction band. d) For each of the following MOS transistor types, draw a fully labelled cross-section of the device, and sketch both the output and transfer characteristics, identifying all important regions: (i) p-channel enhancement device; (ii) n-channel depletion device. Questi on 2 A research engineer has designed a layout for a micro-sensor, which is to be fabricated at a silicon foundry. The smallest feature size in the design is 0.8 microns and the devices are to be fabricated on n-type silicon wafers with a diameter of 200 mm and a doping concentration of 5 x 1015 cm-3. a) The foundry selected to fabricate the devices is using a proximity printing system with an exposure wavelength of 240nm to minimise damage to the wafers and photo-masks. (i) Draw a fully labelled cross-section of the alignment system. (ii) Calculate the maximum allowable separation between wafer and mask to ensure successful pattern transfer. b) A polysilicon layer is to form part of the sensor. The deposition is defined by the following parameters: hg = 6.5 cm.s-1, CT = 2.5x1018 cm-3, Y = 0.02, N1 = 5x1022 cm-3, ko = 1.8x107 cm.s-1, EA = 1.52 eV (i) Calculate the deposition rate at a temperature of 950oC. (ii) What temperature represents the limit of reaction controlled deposition? Assume that for surface reaction controlled film growth ks 0.1 hg, for mass transport controlled film growth hg 0.1 ks, and also that hg is independent of temperature c) The micro-sensor also comprises a pn junction region. This is to be fabricated using the foundry's ion implanter, which can provide a dose of boron ions 0 = 4.5 X 1017 cm-2 at an implant energy of 60 keV. Under these conditions, what will be the depth within the silicon substrate at which the pn junction will form.

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