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1. A 32-bit computer has two selector channels and one multiplexor channel. Each selector channel supports two magnetic disk and two magnetic tape units. The multiplexor channel has two line printers, two card readers, and five VDT terminals connected to it. Assume the following transfer rates. Disk drive 700 Kbytes/s Magnetic tape drive 200 Kbytes Line printer 6.6 Kbytes/s Card Reader 1.2 Kbytes/s VDT 1 Kbytes/s Estimate the maximum aggregate I/O transfer rate in this system. 2. Given the following set of events, show which routines the CPU is executing for times 0 to 100 ns. Each handler routine (with its interrupt request) takes 20 ns to complete. The priority of the interrupts ranges from IRQ6 as the highest priority interrupt to IRQO as the lowest priority interrupt. Time Action Ons Start of main program 10 ns IRQ1 25 ns IRQ4 40 ns IRQ6 50 ns IRQ3 Time Action Ons: Start of Main Program 10 s: IRQ1 3. We pointed out that I/O buses do not need separate address lines. Construct a timing diagram similar to Figure 7.7 that describes the handshake between an I/O controller and a disk controller for a write operation. (Hint: You will need to add a control signal.)

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1) It is necessary to recall that only one device at a time can be served on a selector channel, thus maximum aggregated I/O transfer rate must fulfill this requirement....
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