Introduction
As overall strategy, the project tried to keep the design methodologies used in the architecture of popular MIPS 32 (RISC) processor. However, it was not possible to implement all features due to the requirement of designing a much reduced instruction set. At the same time, one of the main challenges was to cover all instruction types from MIPS using imposed constraint. Not last, the practical aspect was not neglected; for proving the utility of the project, the implementation of the components in a hardware design language has to remain affordable.
The first design decision involves the number of bits allocated for opcode field. This shows the operation to be performed. Since ISA must contain 16 instructions, the most straightforward way is to assign the 4 leftmost bits to the opcode (because 24=16). The remaining fields (up to 16 bits which is the size of instruction word) were allocated function of the instruction type to be executed.
One of the design goals was to minimize the number of functional units and to simplify as much as possible the design of other components that do not make the subject of the current project (e.g. data paths, control signals, address lines, CPU cycles or addressing modes). For instance, the current design can be implemented for a processor that takes four cycles to complete an instruction and uses 16 general purpose registers).

Types of Instructions & Word Format
Another design decision involved the support offered for specific instruction types. Starting from the original MIPS design, it was considered the processor needs to work with the following five groups of instructions:
â€¢ Arithmetic operations executed by ALU â€“ these are done according to 2â€™s complement rules (1);
â€¢ Logical operations executed by ALU â€“ these are represented by bitwise and arithmetic shifts (2);
â€¢ Memory operations based on load and store instructions (3);
â€¢ Conditional branch operations (4);
â€¢ Jump operations determined by program count (5).
The member instructions for each aforementioned are given below. For all instructions, it will be considered the provided order for the fields is left --> right. This design detail also offers information about the encoding into machine code. The last section of the project provides several examples.
The first class of instructions (arithmetic ALU) contains ADD and SUB. Their word format is also given below:

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