For level 2, you have implement a structural module identical.
Write a test bench to test it for all different values including this: 0, minimum, maximum, positive, negative (25 different combinations).
Show snapshot of simulation in a document and submit it along with Verilog Module.
1-level Carry-Select Adder (CSA)
Conditional sum adder (SUM)
This material may consist of step-by-step explanations on how to solve a problem or examples of proper writing, including the use of citations, references, bibliographies, and formatting. This material is made available for the sole purpose of studying and learning - misuse is strictly forbidden.module carry_sel(a,b,cin,sum,co);
//assuming carry in 0
//assuming carry in 1
//select either carry 1 or 0 using carry out of FA...