# Creating A Calculator Using Verilog

## Question

Build a calculator that takes in two signed 16-bit numbers and performs the following functions
• Subtract the second input from the first input
• Multiply one of the inputs by 5 (your choice on which input)
• Divide one of the inputs by 10 (your choice on which input)
• Bitwise AND
• Bitwise XOR
• Bitwise OR
• Complement one of the inputs (your choice on which input)
• Increment one of the inputs (your choice on which input)
• Decrement one of the inputs (your choice on which input)
Have a 16-bit output to show the result, and a separate 1-bit output to indicate if any overflow occurs. Your testbench should include \$monitor and display inputs and outputs in decimal for readability. An example is \$monitor ("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode,in1,in2,result,overflow);

Here's a rough format to follow:

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 10:32:25 04/26/2015
// Design Name:
// Module Name: Calculator
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
//
//////////////////////////////////////////////////////////////////////////////////
module Calculator(in1,in2,opCode,result,overflow);

input [15:0] in1,in2;
input [3:0] opCode;

output reg [15:0] result;

output reg overflow;

parameter SUB12 = 4'b0001;
parameter MULT5 = 4'b0010;
parameter DIV10 = 4'b0011;
parameter AND12 = 4'b0100;
parameter XOR12 = 4'b0101;
parameter OR12 = 4'b0110;
parameter NOT1 = 4'b0111;
parameter INCR1 = 4'b1000;
parameter DECR1 = 4'b1001;

always @(*)
begin
case (opCode)
begin //in1 and in2 are signed binaries

end
SUB12:
begin //in1 and in2 are signed binaries
\$display ("Subraction operation");
end
MULT5:
begin
\$display ("Multiply by 5");

end
DIV10:
begin
\$display ("Divide by 10");

end
AND12:
begin
\$display ("And operation");

end
XOR12:
begin
\$display ("Exclusive OR (XOR) operation");

end
OR12:
begin
\$display ("OR operation");

end
NOT1:
begin
\$display ("Complement operation");

end
INCR1:
begin
\$display ("Increment operation");

end
DECR1:
begin
\$display ("Decrement operation");

end
default:
begin
\$display ("Defalult operation");
end
endcase

end

endmodule

## Solution Preview

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module calculator(in1,in2,opCode,overflow,result );
input [15:0] in1,in2;
input [3:0] opCode;

output reg [15:0] result;

output reg overflow=0;
wire sa,sb,ssum;

parameter SUB12 = 4'b0001;
parameter MULT5 = 4'b0010;
parameter DIV10 = 4'b0011;
parameter AND12 = 4'b0100;
parameter XOR12 = 4'b0101;
parameter OR12 = 4'b0110;
parameter NOT1 = 4'b0111;
parameter INCR1 = 4'b1000;
parameter DECR1 = 4'b1001;

initial begin //initialize variables
result<= 0;
overflow <= 0;
end...
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