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Assignment -2 Objective: Designing a6 -bit adder using -bit ripple carry adder(s) that can addtwo -bit binary numbers together. Procedure: Part-1 1 Implement the 1-bit Full Adder circuit in this lab assignment. Use the combinations of your input A,B and Cin and get output Cout and Sum. You can test your circuit using binary switches, binary probes, and you can s show values from simulations by selecting "Show Values" option. 2. Use the created circuit from step Ito create: part inl LogicWorks. Thiscan be accomplished using a LogicWorks part called 'port in. You will need portin for each of the sixinputs. Labeleach port using the text tool (Ctrl- E). Make sure you click the port part and name them with their appropriate name such as A.B.C(for carry). Note that the text labels should become purple. b. There will be two output lines which will require the use of "port out" part in LogicWorks Name it like for sum and carry for carry out Part-2 1. Apply all Binput combinations and record the outputs Sum and Cout in truth table. Save your LogicWorks file andleave as anopen circuit 2. With the circuit from above step create part and save tintoa library file. a. Open new device symbol. (File ->New- >Device Symbol) b. Select the Options menu, and then "Subcircuit and Parts Type" This opens another window. Select "Create asub- -circuit symbol and select anopen circuit to attach to t." Click the subcircuit that you have createdi Step 2. c. Auto-create device symbol if desired (Under Options menu) d. Layout the part graphic desired Ifyou want you can create almost any shape LogicWorks since only logical representation and not an actual part. Ensure pins areinthe correct location e. Save the part to new library (File->Save) Give proper name like FullAdder. clf. Part-3 1 You havel to create above full adders with two different logics, one using XOR AND OR logic and another using XOR NAND NAND logic. Create sub circuit for each of these implementations and mention above in part- and part-) that willgive you full adder circuit. 2. You can use that full adder circuit to create bit adder. Place vour full adders in cascading order to create design for 6 bit adder Use two Hex Keyboards, one for input and another for input B, and one Hex Display for displaying the final sum 3. The Hex Keypad the input counterpart of Hex Display. generates the 4bit binary equivalent of the number selected on it. Since this isa Ripple Carry Adder, the carry out of the first adder connected to the carry inof the second adder. The carry out of the last adder our overflow status signal. 4. The delay an adderis the time difference between the timethe input changed and the time when the output does not change any more. Using the timing windowin LogicWorks, please review the addition timing of the addition oper ations (111111 to000001) your delay measurements Try to determine the worst case delay (or critical path delay); include some screen captures/prints as necessary The Timing Window: Toruna simulation the simulation menu provides the tools to aid in the simulation process as shown. T Siruscion Fu Smusion Single You will immediately see the Timing window come to life with the displayed values on the CLK line. By default, any named signal shown automatically in the Timing window. 30) 4? L L ras - - JU L_ L - - - U L 30 5.Develop and provide README file for this lab. In addition to the basic README requirements, include your responses and findings from the above problems including description of how you set UD your simulation/test environment

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