## Question

1. For the continuous system and operating domain wipa Β³ wipideal, transfer function

WIPa(s)/Wd(s) and delay D=2 days, use step response to adjust Kc to obtain the shortest settling time with no overshoot/undershoot. Plot response to a 1-hour step work disturbance wd(t) for value of Kc found. Use the following continuous controller:

π4(π‘) = π3(π‘ β π·) + πΎ4π€ππ2(π‘ β π·).

2. For the discrete closed-loop system and operating domain wipa Β³ wipideal, transfer function WIPa(z)/Wd(z) and delay D=2 days, use step response plots to adjust Kc to obtain the shortest settling time with no overshoot/undershoot. Plot response to a 1-hour step work disturbance wd(kT) for the value of Kc found. Use the following discrete controller:

π = < = where d is an integer

π4(ππ) = π3((π β π)π) + πΎ4π€ππ((π β π)π)

3. Compare the values of Kc obtained above for these continuous and discrete closed-loop systems with D=2 days.

4. For the discrete closed-loop system described above, operating domain wipa Β³ wipideal, transfer function WIPa(z)/Wd(z) and delay D=1 day, analytically determine the value of Kc that results in a characteristic equation with two equal real roots and therefore a critically damped system (z=1). Verify this using the βdampβ function. Plot the response to a 1-hour step work disturbance wd(kT) for the value of Kc found.

5. For the discrete closed-loop system described above, operating domain wipa Β³ wipideal, transfer function WIPa(z)/Wd(z) and delay D=1 day, plot the open-loop frequency response with Kc=1 day-1. Then find the value of Kc that results in a system with a 70Β° phase margin.

Plot resulting the open-loop frequency response using the βmarginβ function and plot the resulting closed-loop frequency response using the βbodeβ function (gain and phase margins only are applicable to the open-loop frequency response). Also plot response to a 1-hour step work disturbance wd(kT) for the value of Kc found.

6. For the discrete closed-loop system described above, operating domain wipa Β³ wipideal, transfer function WIPa(z)/Wd(z) and delay D=1 day, use step response plots to adjust Kc to obtain the shortest settling time with no overshoot/undershoot. Plot response to a 1-hour step work disturbance wd(kT) for the value of Kc found.

7. Compare the values of Kc and the step responses obtained using the above three methods for the discrete closed-loop system with D=1 day.

8. Referring to the responses obtained above for closed-loop systems with D=1 day and D=2 days, what does this imply regarding the importance of agility and deployment of smart manufacturing technologies to reduce or eliminate delay in closed-loop production systems?

## Solution Preview

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%%Question 1clc;

clear all;

Kc = [0.1 0.2 0.3];

D = 2;

for i = 1:length(Kc)

H = tf(Kc(i),[1 0],'iodelay',D,'TimeUnit','days');

G(i) = feedback(1,H);

end

figure;

step(G(1),G(2),G(3));title('WIP_{a}');ylabel...

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