Q2 (i) Figure 2.1 shows a full-adder circuit which consists of tw...

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Q2 (i) Figure 2.1 shows a full-adder circuit which consists of two half-adders (HA1 and HA2) and an OR gate. The truth table of a half-adder is shown in Table 2.1. carry1 A=1 Carry_out HA1 sum1 carry2 OR B=0 HA2 sum2 Sum Carry_in=1 Figure 2.1 Input 1 Input 2 Sum Carry 1 1 1 1 1 1 1 Table 2.1 If three inputs A. B and Carry_in have the values as shown in Figure 2.1; (a) write down the values of the outputs for each half-adder, i.e., carry1, sum1, carry2 and sum2. [4 marks] (b) write down the values of Sum and Carry_out [2 marks]

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