4) the H 1 H 1 I 1 I 1 A I I 1 1 I I 1 1 8 I I...

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4) the H 1 H 1 I 1 I 1 A I I 1 1 I I 1 1 8 I I I I 1 1 1 1 c in c 8 A 3K 9K R4 +3V: R1 +15V 12K +8V R2 1.5K -5V R3 OA1 OUT + -15V What is the expected voltage in volts at the output terminal with the given input conditions? A) 15V (Positive Rail) SET D SET D Q OUT CLR CLR 9 < Voc CLOCK 10) Given a clock input frequency of 16Khz, what it the resulting output frequency? A) 32Khz B) 8Khz C) 16Khz D) 4Khz

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